NT40E3-4-PTP

40 Gbps Packet Capture and Analysis 

The PCI-SIG® certified NT40E3-4-PTP accelerator provides full packet capture and analysis of Ethernet LAN at 40 Gbps with zero packet loss for all frame sizes. Intelligent features accelerate application performance with extremely low CPU load. Flexible time synchronization support is included with a dedicated PTP port. 

 

Accelerate Your Time-to-Market, Reduce Risk 

Napatech Software Suite provides an efficient migration path by allowing you to mix and match ports and speeds. An advanced cooling design assures the required airflow while sensors monitor voltage, power, and temperature.​

The accelerator also comes in a NEBS level 3 compliant variant.

 

 

FINANCIAL LATENCY MEASUREMENT
 
Our solutions deliver data to applications that make delays visible by capturing all transactions and measuring the exact time of each trading event up to the nanosecond. This enables financial institutions to guarantee optimal performance and transparency of their trading infrastructure.
NETWORK PERFORMANCE MANAGEMENT
 
Our solutions deliver data to applications that monitor and troubleshoot all network activity in real time, enabling analysis of network performance metrics from multiple locations in the network. This helps network managers to optimize infrastructure efficiency.
TROUBLESHOOTING AND COMPLIANCE 
 
Our solutions deliver data to applications that provide access to all information that has passed through the network in the order it was received. This allows network managers to comply with regulations, as well as analyze problems from historical data. It also allows them to take actions that will prevent problems from recurring in the future.
REVENUE AND SERVICES OPTIMIZATION
 
Our solutions deliver data to applications that can analyze subscriber behavior as well as specific app usage, enabling operators to adjust their services and business models to maximize value.
FULL LINE-RATE PACKET CAPTURE
 
Napatech accelerators are highly optimized to capture network traffic at full line-rate, with almost no CPU load on the host server, for all frame sizes. Zero-loss packet capture is critical for applications that need to analyze all the network traffic. If anything needs to be discarded, it is a matter of choice by the application, not a limitation of the accelerator. 
 
Standard network interface cards (NICs) are not designed for analysis applications where all traffic on a connection or link needs to be analyzed. NICs are designed for communication where data that is not addressed to the sender or receiver is simply discarded. This means that NICs are not designed to have the capacity to handle the amount of data that is regularly transmitted in bursts on Ethernet connections. In these burst situations, all of the bandwidth of a connection is used, requiring the capacity to analyze all Ethernet frames. Napatech accelerators are designed specifically for this task and provide the maximum theoretical packet capture capacity.
 
HARDWARE TIME STAMP
 
The ability to establish the precise time when frames have been captured is critical to many applications. 
 
To achieve this, all Napatech accelerators are capable of providing a high-precision time stamp, sampled with 4 nanosecond resolution, for every frame captured and transmitted.
 
At 10 Gbps, an Ethernet frame can be received and transmitted every 67 nanoseconds. At 100 Gbps, this time is reduced to 6.7 nanoseconds. This makes nanosecond-precision time-stamping essential for uniquely identifying when a frame is received. This incredible precision also enables you to merge frames from multiple ports on multiple accelerators into a single, time-ordered analysis stream.
 
In order to work smoothly in the different operating systems supported, Napatech accelerators support a range of industry standard time stamp formats, and also offer a choice of resolution to suit different types of applications.
 
64-bit time stamp formats:
  • 2 Windows formats with 10-ns or 100-ns resolution
  • Native UNIX format with 10-ns resolution
  • 2 PCAP formats with 1-ns or 1000-ns resolution
TIME SYNCHRONIZATION
 
With hardware time stamps, individual frames can be time-stamped with high precision. However, to assure that the time stamps in frames from different accelerators in the same, or even different, appliances are comparable, the clocks driving the time stamp engines must be synchronized. Napatech has advanced HW time synchronization between accelerators.
 
There are various mechanisms to provide time synchronization, including synchronization with the operating system clock, known as OS time synchronization. However, for the best accuracy, a hardware-based time synchronization solution based on an industry standard time synchronization protocol should be used. For many applications that rely on accurate time stamps to understand when an event occurred or accurately measure delay across high-speed networks, nanosecond accuracy is essential.
 
Napatech accelerators provide flexible support for a range of standard time synchronization mechanisms. Dedicated time synchronization connectors enable direct time signal input from an external time source and retransmission of time synchronization signals to other accelerators. In this way, multiple accelerators in the same host or in different hosts will operate in lockstep in a large synchronous installation.
 
Napatech accelerators are designed to accommodate the time synchronization mechanisms available during deployment. With dedicated ports that can accommodate multiple time synchronization protocols, Napatech provides a flexible solution that does not need to sacrifice ports which are normally used for capture and transmission.
 
The following list contains some of the time synchronization mechanisms supported:
 
IEEE 1588-2008 /PTPv2 Time Synchronization
PPS Time Synchronization
GPS and CDMA Time Synchronization over PPS and Server Serial Port
OS Time Synchronization
MULTI-PORT PACKET MERGE
 
Napatech accelerators typically provide multiple ports. Ports are usually paired, with one port receiving upstream packets and another port receiving downstream packets. Since these two flows going in different directions need to be analyzed as one, packets from both ports must be merged into a single analysis stream. Napatech accelerators can merge packets received on multiple ports in hardware using the precise time stamps of each Ethernet frame. This is highly efficient and offloads a significant and costly task from the analysis application.
 
There is a growing need for analysis appliances that are able to monitor and analyze multiple points in the network, and even provide a network-wide view of what is happening. Not only does this require multiple accelerators to be installed in a single appliance, but it also requires that the analysis data from all ports on every accelerator be correlated.
 
With the Napatech Software Suite, it is possible to merge the analysis data from multiple accelerators into a single analysis stream. The merging is based on the nanosecond precision time stamps of each Ethernet frame, allowing a time-ordered merge of individual data streams.
 
NETWORK INTERFACES
 
Standard: IEEE 802.3 10 Gbps Ethernet LAN
Physical interface: 4 x SFP+ ports
SUPPORTED SFP+ MODULES
 
10GBASE-SR (Multi-mode, 850 nm)
10GBASE-LR (Singlemode, 1310 nm)
10GBASE-ER (Singlemode, 1550 nm)
10GBASE-CR (Direct Attach copper)
PERFORMANCE
 
Capture rate: 4 x 10 Gbps
Transmit rate: 4 x 10 Gbps
CPU load: < 5%
ON-BOARD IEEE 1588-2008 (PTPV2)
 
Full IEEE 1588-2008 stack
Packet Delay Variation (PDV) filter
PTP master and slave in IEEE 1588-2008 default profile
PTP slave in IEEE 1588-2008 telecom and power profiles
HARDWARE TIME STAMP
 
Resolution: 4 ns
Stratum 3 compliant TCXO
TIME FORMATS
 
PCAP-ns/-μs
NDIS 10 ns/100 ns
UNIX 10 ns
TIME SYNCHRONIZATION
 
External connectors: Dedicated pluggable
Internal connectors: 2 for daisy-chain support
PLUGGABLE OPTIONS FOR TIME SYNCHRONIZATION
 
PPS for GPS and CDMA
IEEE 1588-2008 (PTP v2)
NT-TS for accelerator-to-accelerator time sync
HOST INTERFACE AND MEMORY
 
Bus type: 8-lane 8 GT/s PCIe Gen3
PCIe performance: 48 Gbps full duplex
Onboard RAM: 4 GB DDR3
Flash: Supports 2 boot images
STATISTICS
 
RMON1 counters plus jumbo frame counters per port
Frame and byte counters per color (filter) and per host buffer
Counter sets always delivered as a consistent time-stamped snapshot
ENVIRONMENT FOR NT40E3-4-PTP
 
Power consumption: 27 Watts including SFP+ SR modules
Operating temperature: 0° to 45°C (32° to 113°F)
Operating humidity: 20% to 80%
MTBF: 297,993 hours according to UTE C 80-810
ENVIRONMENT FOR NT40E3-4-PTP-NEBS
 
Operating temperature (up to 1,800 m and airflow of at least 2,5 m/s): –5 °C to 55 °C (23 °F to 131 °F) measured around the accelerator
Operating humidity: 5% to 85%
SENSORS
 
Temperature
Power
OS SUPPORT
 
Linux
FreeBSD
Windows
 
SOFTWARE
 
Easy-to-integrate NT-API
libpcap support
WinPcap support
Software PTP stack
PHYSICAL DIMENSIONS
 
½-length PCIe
Full-height PCIe
REGULATORY APPROVALS AND COMPLIANCES
 
PCI-SIG®
NEBS level 3
CE
CB
RoHS
REACH
cURus (UL)
FCC
CSA
VCCI
C-TICK