Skip to content
NT50B01 SmartNIC

Test form, fit, and function. Our engineers will help you all the way.

NT200A02 SmartNIC
with Link-Inline™ Software


To maintain performance at high speeds and address challenges with cyber security and telecom user plane applications, Link-Inline™ software offloads packet and flow-based processing to reconfigurable FPGA-based SmartNICs. The SmartNIC NT200A02 performs flow classification and identification on ingress and maintains state for each packet of a flow. For known flows, action processing is dynamically handled completely in the SmartNIC and all other packets are forwarded to the application for additional analysis to minimize the load on user-space applications. Link-Inline™ Software additionally provides the ability to dynamically identify and direct data flows into specific CPU cores based on the type of traffic being analyzed. Link-Inline™ software is tightly coupled to x86 cores for optimized flow processing in demanding applications. Per-flow match/action processing in HW gives control back to the user providing additional computation to the application by reducing the amount of data needed for processing as certain flows or protocols that no longer need monitoring and can be blocked or forwarded in hardware.

Napatech’s Link-Inline™ software accelerates standard Linux applications and provides open APIs for development and integration of inline network applications. The solution significantly reduces host CPU utilization and solution latency by offloading complex flow classification and packet processing to the SmartNIC.

To accommodate seamless Integration in any server, the NT200A02 is available with active or a passive cooling. The passive cooling model is also NEBS compliant to meet telco requirements.


Cyber Security

5G Telecom User Plane Function

Napatech SmartNICs enable implementation of high-performance network appliances based on standard servers.
Examples of applications include:

• Quality of experience optimization
• Financial latency measurement
• Customer experience analysis
• Data loss prevention
• Cyber defense

• Fraud detection and compliance management
• Infrastructure management and security
• Network and application performance
• Troubleshooting and compliance

Compatible Inline Software

Link-Inline™ Software

Link-Inline™ Software

Link-Inline™ Software boosts applications by offloading packet and flow processing, providing unmatched visibility and performance.

NT200A02-SCC SmartNIC

NT200A02-NEBS SmartNIC

To generate and control the airflow, the Napatech design contains a blower that takes in air from the top and bottom of the SmartNIC, thereby doubling the amount of air and ensuring superior cooling.


  • Durable design for extended real-life operation
  • Free choice of server platform
  • Reduced noise and power-consumption as server-fans can run at minimum speed
  • Freedom to pack unlimited FPGA SmartNICs into a standard server


  • No airflow dependency to server
  • Well-defined cooling of all critical components
  • Guaranteed device hot spot temperatures
  • Maximized airflow, ensuring optimal thermal performance
  • Dissipated energy exhaled outside server through front plate cutouts
  • Significant reduction in temperature drop between FPGA die and heat sink surface
  • Mechanical stiffener enabling higher screw torque for fastening heatsink to the PCB


Napatech upholds the highest quality, environmental and safety standards, and complies with all applicable regulations across regions. This helps our customers to realize a seamless integration without delays – and ensures error-free operation throughout the product life cycle.

Ethernet Front Port Compliance

The SmartNIC design maximizes mechanical and electrical front port margin, securing trouble-free operation with the optical or electrical modules of the customer’s choice.

The thermal design is validated dissipating the maximum power level as standardized for the given form factor. Margin on the data interface has been optimized tuning the equalization parameters of the transceivers hosting the front port channel, maximizing EYE margin to the relevant standard.

EMC Compliance

All Napatech designs have passed EMC compliance testing for major regions, including Europe and North America. By ensuring compliance as an integral part of the design, the risk of delays is eliminated. Moreover, the EMC testing has been performed in a mainstream server, potentially directly applicable to the use case.

Environmental Compliance

The end product (server + installed SmartNIC) must adhere to regional environmental legislation. To enable trouble-free server integration, Napatech SmartNICs are manufactured using only materials that fully comply with the current RoHS, REACH and proprietary Tier 1 legislation.

Full compliance from early inception eliminates the risk delays and product withdrawal due to authority intervention.

Event Handling & System Monitoring

In order for the SmartNIC to become an integral part of the server environment and maximize uptime, it needs to monitor and expose key performance metrics to the application during operation. Napatech SmartNICs monitor the following metrics:

  • Blower speed
  • Hot spot temperatures
  • Key supply voltages and currents
  • PCI protocol events
  • General system events

PCI Compliance

With the PCI interface on the SmartNIC dictated by the server plane, the hardware maximizes mechanical and electrical PCI margin, ensuring trouble-free operation in the server and server slot(s) of the customer’s choice. All designs have passed relevant PCI-SIG tests and have been adopted on the PCI-SIG integrators list.

Safety Compliance

To enable trouble-free server integration, Napatech SmartNICs are fully compliant with all applicable safety standards.

By ensuring safety compliance as an integral part of the SmartNIC design, the risk of delays is eliminated. Compliance testing is performed in a mainstream server, potentially directly applicable to the use case.

Conflict Minerals Compliance

To ensure quick and trouble-free server integration, Napatech SmartNICs are manufactured using only materials that fully comply with the relevant Conflict Mineral Legislation. For US based SmartNIC integrators, this facilitates submission of the mandatory Conflict Mineral report to SEC.

Shock & Vibration Robustness

Many server environments expose the SmartNIC to substantial shock and vibration, predominantly during the transportation phase. To ensure trouble-free server integration and operational robustness throughout the product life cycle, validated design aspects include:

  • Cooling enclosure for superior mechanical stiffness
  • Key exposed components are under-filled (glued) to the PCB
  • Shock robustness validated against JESD22-B110A
  • Vibration robustness validated against ASTM D4169-09

Used across industries

Cyber Security Processing Challenges

Network security architects are seeing requirements for their solutions quickly changing with the explosion in network throughputs while at the same time, the threat landscape is continuously evolving and becoming more complex and sophisticated. Stateless security solutions are no longer adequate to identify and block threats. Inline networking and security solutions require complete and stateful awareness of all users and applications.

To support these requirements, network infrastructures need to contain more intelligence with deeper inspection of traffic at increasing line rates. With this need for inline stateful flow processing, application awareness, content inspection, and security processing, the amount of compute power to meet these increasing line rates grows exponentially.

5G Telecom User Plane Processing Challenges

As Communications Service Providers scale up the deployment of their 5G networks, it becomes critical to optimize the Return on Investment for their infrastructure. With 5G User Plane Function (UPF) representing a significant part of the overall workload for the 5G Packet Core, it’s important to leverage solutions that maximize the number of users supported per server and thereby minimize the overall cost per user. The UPF applications must handle multiple actions per flow on each packet transferred from ingress to egress port. Actions include GTP encapsulation/decapsulation, MBR policing, DSCP tagging, charging info, and NAT. This imposes a high burden to the server CPU cores and there is a need for offloading server systems to achieve acceptable Return on Investment.

Feature Highlights and Specifications


Stateful flow management
  • Up to 140 million flow
  • Learning rate: > 1.5 million flows/sec
  • Flow match/actions:
    • Drop
    • Fast forward (inline / hairpin)
    • RSS (CPU load distribution)
    • GTP encapsulation/decapsulation (1k L2, L3 or L4 setups)
    • Tunnel ID configured per flow
    • MBR (Maximum Bit Rate) policing
    • DSCP (Differentiated Services Code Point) tagging
    • NAT (Network Address Translation)
    • Flow mirroring
  • Flow termination: TCP protocol, timeout, application-requested
  • Flow records: Rx packet/byte counters and TCP flags, delivered to application at flow termination
  • Configurable flow definitions based on 2-, 3-, 4-, 5- or 6-tuple
  • Configurable 2-, 3-, 4-, 5- or 6-tuple, enabling up to 36,000 IPv4 or up to 8,000 IPv6 addresses
  • 864 (32-bit) wildcard entries
  • General purpose filters: Pattern match, network port, protocol
CPU load distribution
  • Load distribution based on hash key, filter or per flow
  • Hash keys, calculated on 5-tuple from inner or outer headers
Rx Packet Processing
  • 128 Rx queues
  • Multi-port packet merge, sequenced in time stamp order
  • L2, L3 and L4 protocol classification
    • L2: Ether II, IEEE 802.3 LLC, IEEE 802.3/802.2 SNAP
    • L2: PPPoE Discovery, PPPoE Session, Raw Novell
    • L2: ISL, 3x VLAN, 7x MPLS
    • L3: IPv4, IPv6
    • L4: TCP, UDP, ICMP, SCTP
  • Tunneling support
    • GTP, IP-in-IP, GRE, NVGRE, VxLAN, Pseudowire, Fabric Path
Tx Packet Processing
  • 128 Tx queues
Network Standards
  • IEEE 802.3 100G Ethernet
Supported pluggable modules
  • 100GBASE-SR4, SR-BiDi, LR4
Supported OS and Orchestration
  • Linux kernel 5.17 (64-bit)
  • Kubernetes
Supported APIs
  • DPDK v. 21.11.1, RTE_FLOW, RTE_METER
  • Xilinx XCVU5P FPGA
  • 12 GB DDR4 SDRAM
  • PCIe Gen3 16 lanes @ 8 GT/s
  • 2 × QSFP28 network ports
  • RJ45-F 1000BASE-T IEEE1588 PTP
  • SMA-F PPS input/output
  • 2 × internal MCX-F PPS and NT-TS time sync
  • Stratum-3 [1] compliant TCXO
  • Flash memory with support for two boot images
  • Physical dimensions: ½-length and full-height PCIe
  • Weight excluding pluggable modules:
    • NT200A02-SCC: 355 g
    • NT200A02-NEBS: 350 g
  • MTBF according to UTE C 80-810:
    • NT200A02-SCC: 317,821 hours
    • NT200A02-NEBS: 398,565 hours
  • Power consumption including 100GBASE-SR4 modules and typical traffic load:
    • NT200A02-SCC: 75 Watts
    • NT200A02-NEBS: 75 Watts
Board Management
  • MCTP over SMBus
  • PLDM for Monitor and Control
  • Built-in thermal protection
Monitoring Sensors
  • PCB temperature level with alarm
  • FPGA temperature level with alarm and automatic shutdown
  • Temperature of critical components
  • Individual optical port temperature and light level with alarm
  • Voltage or current overrange with alarm
  • Cooling fan speed with alarm
Environment for NT200A02-SCC (active cooling)
  • Operating temperature: 0 °C to 45 °C (32 °F to 113 °F)
  • Operating humidity: 20% to 80%
Environment for NT200A02-NEBS (passive cooling)
  • Operating temperature: –5 °C to 55 °C (23 °F to 131 °F) measured around the SmartNIC
  • Operating humidity: 5% to 85%
  • Altitude: < 1,800 m
  • Airflow: >= 2.5 m/s
Regulatory Approvals and Compliances
  • PCI-SIG®, NEBS level 3, CE, CB, RoHS, REACH, cURus (UL), FCC, ICES, VCCI, RCM
Product: Data Rates included:
NT200A02-2×100 2 × 100 Gbps

Resources and downloads

Try a free 30-day trial

Find out if the Napatech NT200A02 SmartNIC Inline is right for you
– our engineers will help you all the way.

Back To Top