Ultra-Low latency AI for finance
Xelera Silva Acceleration Solution
Napatech SmartNICs and IPUs
By combining Xelera Silva’s high-performance software with Napatech’s ultra-low latency hardware acceleration, financial institutions gain a market advantage through faster trades, stronger security, and more efficient data processing.
Xelera Technologies is a software provider for high-speed network technology and machine learning applications. They solve data rate and response time bottlenecks in software applications and systems with a performance-optimized software stack. Their product also increases the energy efficiency of data center and cloud servers.
Xelera Silva is an AI inference accelerator designed to deliver ultra-low latency for machine learning models like XGBoost, LightGBM, and CatBoost. A ready-to-use solution, it eliminates latency bottlenecks and enhances throughput by leveraging Napatech SmartNIC or IPU. This makes it particularly suitable for high-frequency trading (HFT) applications where rapid decision-making is critical.
Napatech and Xelera Use Case
High-Frequency Trading: Software API Integration
Software API Integration
High Frequency Traders use decision algorithms to automate trading instructions. The automated decisions are increasingly made by AI models. A low latency is key for these systems. Silva overcomes the latency disadvantage of machine learning algorithms: Inference of XGBoost, LightGBM and CatBoost models is performed with a latency of a few microseconds. This enables our clients to make better, sophisticated trading decisions and win speed races. The turn-key accelerator connects to the software-based trading system and offloads the AI inference to a Napatech SmartNIC or IPU.
Latency 1.55 μs
The turn-key accelerator connects to the software-based trading system and offloads the XGBoost / LightGBM / CatBoost inference to a Napatech SmartNIC or IPU (ultra-low latency PCIe transfer included in round-trip latency).
Benchmark
Test model: XGBoost Regression
Number of features: 100
Number of trees: 1000
Number of levels: 8
Batch size: 1
Integrating Xelera Silva with Napatech’s SmartNICs and IPUs offers several key benefits for the finance industry, particularly in high-frequency trading (HFT) applications.
Ultra-Low Latency
Napatech’s FPGA-based SmartNICs and IPUs provide nanosecond-level packet processing, ensuring lightning-fast trade execution. Reduces jitter and latency spikes, crucial for HFT, algorithmic trading, and real-time analytics.
Accelerated Market Data Processing
Napatech’s SmartNICs and IPUs offload TCP/IP processing, timestamping, and data filtering, allowing faster decision-making. Xelera Silva’s software optimizes real-time market data feed handling, improving trade execution strategies.
Enhanced Security and Fraud Detection
Real-time packet inspection and deep packet analysis detect fraudulent activities and cybersecurity threats instantly. Napatech’s SmartNICs and IPUs accelerate AI/ML-based fraud detection models, enabling financial institutions to analyze massive datasets without CPU bottlenecks.
Cost-Efficient Risk Management and Compliance
Regulatory compliance (e.g., MiFID II, SEC 613) is simplified with high-precision timestamping and packet capture for auditing. Napatech SmartNICs and IPUs reduce CPU workloads, lowering data center power consumption and operational costs.
Scalable and Future-Proof Financial Infrastructure
Supports high-bandwidth (10/25/100G) financial networks, ensuring scalability for future data demands. Napatech’s programmable SmartNICs and IPUs allow customization for evolving finance applications without frequent hardware upgrades.
Seamless Integration with Existing Financial Systems
Supports FPGA acceleration for FIX protocol processing, risk analysis, and transaction monitoring. Easily integrates with cloud, hybrid, and on-premise financial infrastructures.
The Napatech SmartNIC and IPU family for high-performance network acceleration compatible with Xelera Silva
Supports 10G, 25G, 40G, 50G, and 100G network speeds.
The Napatech SmartNIC and IPU family consists of programmable, high-performance Smart Network Interface Cards (SmartNICs) and Infrastructure Processing Units (IPUs) designed to accelerate and optimize networking, security, and cloud applications. These FPGA-based SmartNICs offload processing from CPUs, enabling ultra-fast packet capture, analysis, and security enforcement in high-speed networks.
