Scaling Security Applications to 100 Gbps with Napatech SmartNICs
Learn how offloading flows in networking and security architectures frees up CPU resources by using hardware-based action processing of traffic.
Learn how offloading flows in networking and security architectures frees up CPU resources by using hardware-based action processing of traffic.
Build advanced Test & Measurement solutions with COTS servers and Napatech FPGA SmartNIC’s. The Napatech Link Capture software supports powerful features for Test & Measurement applications. Nanosecond hardware transmit and receive timestamping enables precision network roundtrip delay and jitter measurements...
Accelerating Suricata with Napatech stateful flow processing technology. Suricata is a free open source, mature, fast and robust network threat detection engine. The Suricata engine is capable of real time intrusion detection (IDS), inline intrusion prevention (IPS), network security monitoring (NSM) and offline PCAP..
Improving Performance and Reducing CPU Utilization For Server Based Applications and Services. Presented by Napatech CMO Jarrod J.S. Siket.
CYBER TALK Network Capture Hardware: The importance of true zero packet loss in cyber security use case.
Performance demonstration of Suricata scaling to 100 Gbps in a standard server with Napatech FPGA SmartNICs.
High performance and most feature-rich virtual switching solution for programmable SmartNICs based on FPGAs. The solution delivers a massive increase in network performance and simultaneous reduction in server CPU utilization, allowing data center operators to fulfill their vision for software defined networking...
The Napatech SmartNIC family supports a common feature set and driver software architecture allowing plug-and-play support for any SmartNIC combination.
In the second part of this series, find out how data plane acceleration with FPGA-based SmartNICs brings to life 5G.
The first in a two-part series on network slicing and data acceleration and its importance in making 5G a reality.