with Link-Capture™ Software
The Napatech SmartNIC allows you to merge data from ports into a single, time-ordered analysis stream. It supports 1-128 packet streams using intelligent hardware flow distribution to allow your application to scale to higher packet rates with no packet loss. The Napatech SmartNIC will distribute packets based on flow or on L3/L4 filter criteria.
For any link speed at any time
PLUG & PLAY
Out of the box solution
Multiple FPGA SmartNICs in one server
Synchronize multiple servers
Accelerate your application
Full throughput with zero packet loss
Multiple speeds in one server
More powerful server usage
To generate and control the airflow, the Napatech design contains a blower that takes in air from the top and bottom of the SmartNIC, thereby doubling the amount of air and ensuring superior cooling.
- Durable design for extended real-life operation
- Free choice of server platform
- Reduced noise and power-consumption as server-fans can run at minimum speed
- Freedom to pack unlimited FPGA SmartNICs into a standard server
- No airflow dependency to server
- Well-defined cooling of all critical components
- Guaranteed device hot spot temperatures
- Maximized airflow, ensuring optimal thermal performance
- Dissipated energy exhaled outside server through front plate cutouts
- Significant reduction in temperature drop between FPGA die and heat sink surface
- Mechanical stiffener enabling higher screw torque for fastening heatsink to the PCB
Napatech upholds the highest quality, environmental and safety standards, and complies with all applicable regulations across regions. This helps our customers to realize a seamless integration without delays – and ensures error-free operation throughout the product life cycle.
Ethernet Front Port Compliance
The SmartNIC design maximizes mechanical and electrical front port margin, securing trouble-free operation with the optical or electrical modules of the customer’s choice.
The thermal design is validated dissipating the maximum power level as standardized for the given form factor. Margin on the data interface has been optimized tuning the equalization parameters of the transceivers hosting the front port channel, maximizing EYE margin to the relevant standard.
All Napatech designs have passed EMC compliance testing for major regions, including Europe and North America. By ensuring compliance as an integral part of the design, the risk of delays is eliminated. Moreover, the EMC testing has been performed in a mainstream server, potentially directly applicable to the use case.
The end product (server + installed SmartNIC) must adhere to regional environmental legislation. To enable trouble-free server integration, Napatech SmartNICs are manufactured using only materials that fully comply with the current RoHS, REACH and proprietary Tier 1 legislation.
Full compliance from early inception eliminates the risk delays and product withdrawal due to authority intervention.
Event Handling & System Monitoring
In order for the SmartNIC to become an integral part of the server environment and maximize uptime, it needs to monitor and expose key performance metrics to the application during operation. Napatech SmartNICs monitor the following metrics:
- Blower speed
- Hot spot temperatures
- Key supply voltages and currents
- PCI protocol events
- General system events
With the PCI interface on the SmartNIC dictated by the server plane, the hardware maximizes mechanical and electrical PCI margin, ensuring trouble-free operation in the server and server slot(s) of the customer’s choice. All designs have passed relevant PCI-SIG tests and have been adopted on the PCI-SIG integrators list.
To enable trouble-free server integration, Napatech SmartNICs are fully compliant with all applicable safety standards.
By ensuring safety compliance as an integral part of the SmartNIC design, the risk of delays is eliminated. Compliance testing is performed in a mainstream server, potentially directly applicable to the use case.
Conflict Minerals Compliance
To ensure quick and trouble-free server integration, Napatech SmartNICs are manufactured using only materials that fully comply with the relevant Conflict Mineral Legislation. For US based SmartNIC integrators, this facilitates submission of the mandatory Conflict Mineral report to SEC.
Shock & Vibration Robustness
Many server environments expose the SmartNIC to substantial shock and vibration, predominantly during the transportation phase. To ensure trouble-free server integration and operational robustness throughout the product life cycle, validated design aspects include:
- Cooling enclosure for superior mechanical stiffness
- Key exposed components are under-filled (glued) to the PCB
- Shock robustness validated against JESD22-B110A
- Vibration robustness validated against ASTM D4169-09
Used across industries
Financial latency measurement
Our solutions deliver data to applications that make delays visible by capturing all transactions and measuring the exact time of each trading event up to the nanosecond. This enables financial institutions to guarantee optimal performance and transparency of their trading infrastructure.
Network performance management
Our solutions deliver data to applications that monitor and troubleshoot all network activity in real time, enabling analysis of network performance metrics from multiple locations in the network. This helps network managers to optimize infrastructure efficiency.
Troubleshooting and compliance
Our solutions deliver data to applications that provide access to all information that has passed through the network in the order it was received. This allows network managers to comply with regulations, as well as analyze problems from historical data. It also allows them to take actions that will prevent problems from recurring in the future.
Revenue and services optimization
Our solutions deliver data to applications that can analyze subscriber behavior as well as specific app usage, enabling operators to adjust their services and business models to maximize value.
Ultimate tech specs
|TECH SPECS||NT40A01-SCC-4×1 & NT40A01-NEBS-4×1|
|Network Interfaces||• IEEE 802.3 1 Gbps or 100 Mbps Ethernet support
• 4 × SFP / dual-rate SFP+ ports
|Supported Modules||• Supported SFP modules: 1000BASE-SX, 1000BASE-LX, 1000BASE-ZX, 1000BASE-T or 100/1000BASE-T
• Supported dual-rate modules: Multi-mode SR and singlemode LR
|Performance||• Typical CPU load: < 5%|
|On-board IEEE 1588-2008 (PTPV2)||• Full IEEE 1588-2008 stack
• Packet Delay Variation (PDV) filter
• PTP slave in IEEE 1588-2008 default and telecom profiles
|Hardware Time Stamp||• Resolution: 1 ns
• Stratum 3 compliant TCXO
|Time Formats||• PCAP-ns/-μs and UNIX 10 ns|
|Time Synchronization||• External connectors: Dedicated pluggable
• Internal connectors: 2 for daisy-chain support
|Pluggable Options for Time Synchronization||• IEEE 1588-2008 PTP
• PPS time synchronization
|Host Interface and Memory||• Bus type: 8-lane 8 GT/s PCIe Gen3
• 4 GB onboard DDR3 RAM
• Flash: Support for two boot images
• Built-in thermal protection
|Environment for NT40A01-SCC-4×1||• Operating temperature: 0 °C to 45 °C (32 °F to 113 °F)
• Operating humidity: 20% to 80%
|Environment for NT40A01-NEBS-4×1||• Operating temperature: –5 °C to 55 °C (23 °F to 131 °F) measured around the SmartNIC
• Operating humidity: 5% to 85%
• Altitude: < 1,800 m
• Airflow: >= 2.5 m/s
|OS Support||• Linux|
|Software||• Napatech API for high performance and advanced features
• IEEE 1588-2008 PTP stack
• SDK tools included in source code for debugging and prototyping and as application examples
|Physical Dimensions||• ½-length PCIe
• Full-height PCIe
|Regulatory Approvals and Compliances||• PCI-SIG®
• NEBS level 3
• cURus (UL)