The three stages of reconfigurable computing – stage 3
The final in the 3-part series of articles by Dan Joe, where he explores the various stages of reconfigurable computing.
Combining stage gate and agile process models for product development
When it comes to balancing long-term development and short-term customer needs it is all about finding the right process. In his first blog article, Ulrik Moller looks into the benefits of combining stage gate and agile process models for product development.
The three stages of reconfigurable computing – stage 2
The second in the 3-part series of articles by Dan Joe, where he explores the various stages of reconfigurable computing.
The three stages of reconfigurable computing – stage 1
The first in the 3-part series of articles by Dan Joe, where he explores the various stages of reconfigurable computing.
Packet Capture As a Service
A blog article by Alex Agerholm, who explains and delves into the concept of packet capture as a service in a virtualized environment.
QSFP-DD, the new ‘kid’ on the block
As a continuation to his previous blog - “Flexible Pluggable Front Port Technology”, in the current blog Claus Ek focuses on the latest addition to the QSFPx form factor family - the QSFP-DD.
Why do you need 100G network traffic replay?
In his latest blog, Sven talks about the network traffic replay at 100G and its benefits in a test scenario.
In the Age of FPGA
FPGA has shown that it can provide significant acceleration and a high level of reconfigurability and doing all that with an efficient compute power per watt.
So where does all this lead and who is the winner?
Is it time to reimagine the NFV infrastructure?
In the run-up to SDN World Congress in The Hague, it is interesting to note that it was at this very show in Dusseldorf 5 years ago that the original NFV whitepaper was first presented. How time flies!
Flexible Pluggable Front Port Technology
I am writing this blog article in continuation of my previous blog – “Future-proof FPGA platforms the longevity and upgradability”. In this blog entry, I discuss the available pluggable front port technology, complementing the flexible properties of the described future-proof FPGA-based SmartNICs.