Peter Sanders, VP Field Applications Engineering at Napatech, looks at the importance of zero packet loss to a successful IDS deployment - measured by its effects on intrusion alert generation and file extraction.
Is your deployment resilient to common data center performance issues? This blog looks at the issue of duplicate traffic in misconfigured environments – and considers the benefits of adding deduplication via a SmartNIC.
In this blog, Chief Product Architect Alex Agerholm looks at the standard definition of network flows and explores the great potential that can be realized for lookup technology by seeing beyond conventional flow compositions.
For efficiency, a lot of monitoring and analysis tools focus on flow records to detect anomalies in the network - and only dive to the underlying packet level if needed. In this blog, Chief Product Architect Alex Agerholm discusses typical use cases, looks at NetFlow/IPFIX acceleration and speculates on the imminent future of flow processing.
Following some recent work to run VXLAN using HW offload, the Napatech OVS offload initiative now explores another important feature: mirror offload. Learn how this enables monitoring without affecting performance of the overall system.
Lately, Napatech has been working on a full OVS offload implementation. See how we've achieved a 6x performance gain compared to a basic OVS+DPDK solution running on a standard NIC.
CPU-bound security applications are severely challenged to process an ever-increasing number of packets. In this blog, Chief Product Architect Alex Agerholm discusses how flow shunting can help address this performance bottleneck and explains how the next level of acceleration is achieved.
The new Intel® Programmable Acceleration Card (PAC) with Intel® Arria® 10 GX FPGA can now run Napatech firmware. Chief Technology Architect Michael Lilja explores Intel's OPAE framework and takes a closer look at the PAC hardware and Napatech value-add.
When you stop to think about it, the entire IT industry is driven by the premise that Moore’s law will continue to provide double the number of transistors per square inch every 18 months and thereby help us to keep up with the relentless growth in data to be processed. What happens when this is no longer true?
In continuation of his previous blog on the history, vision and challenges of NFV, Daniel Proch now moves on to discuss the solutions that are required to overcome those challenges.